.*: Assembler messages:
.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,15,vgx3\],{ ?z0.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.d\[w8,0,vgx3\],{ ?z30.h-z31.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z15.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h\[7\]'
.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},z0.h\[7\]'
.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},z0.h'
.*: Error: missing type suffix at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0-z1 ?},z0.h\[7\]'
.*: Error: missing type suffix at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0-z1 ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx1\],{ ?z10.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,15,vgx1\],{ ?z0.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z30.h-z31.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z15.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h\[7\]'
.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},z0.h\[7\]'
.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},z0.h'
.*: Error: missing type suffix at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0-z1 ?},z0.h\[7\]'
.*: Error: missing type suffix at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0-z1 ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,15,vgx3\],{ ?z0.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmla za.d\[w8,0,vgx3\],{ ?z31.h-z0.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z15.h'
.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},z15.h'
.*: Error: operand mismatch -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},z15'
.*: Info:    did you mean this\?
.*: Info:    	fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z15.h
.*: Error: operand mismatch -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},z20'
.*: Info:    did you mean this\?
.*: Info:    	fmla za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z20.h
.*: Error: comma expected between operands at operand 3 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w14,0,vgx1\],{ ?z10.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,15,vgx1\],{ ?z0.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z31.h-z2.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmla za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z15.h'
.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},z15.h'
.*: Error: operand mismatch -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},z15'
.*: Info:    did you mean this\?
.*: Info:    	fmla za.h\[w8, 0, vgx4\], { ?z0.h-z1.h ?}, z15.h
.*: Error: operand mismatch -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},z20'
.*: Info:    did you mean this\?
.*: Info:    	fmla za.h\[w8, 0, vgx4\], { ?z0.h-z1.h ?}, z20.h
.*: Error: comma expected between operands at operand 3 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.d\[w8,15,vgx3\],{ ?z0.h-z1.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx3\],{ ?z30.h-z31.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.b\[w8,0,vgx3\],{ ?z0.h-z1.h ?},{ ?z30.h-z31.h ?}'
.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h-z31.h ?}'
.*: Error: expected a list of 2 registers at operand 3 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},{ ?z30.h ?}'
.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Error: expected a list of 2 registers at operand 2 -- `fmla za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Error: operand mismatch -- `fmla za.b\[w8,20,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Info:    did you mean this\?
.*: Info:    	fmla za.h\[w8, 20, vgx2\], { ?z0.h ?}, { ?z30.h ?}
.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,0,vgx1\],{ ?z0.h-z1.h ?},{ ?z0.h-z3.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w14,0,vgx1\],{ ?z10.h-z1.h ?},{ ?z0.h-z3.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.s\[w8,15,vgx1\],{ ?z0.h-z1.h ?},{ ?z0.h-z3.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.h\[w8,0,vgx1\],{ ?z30.h-z31.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmla za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},{ ?z30.h-z31.h ?}'
.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h-z31.h ?}'
.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},{ ?z30.h ?}'
.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Error: expected a list of 4 registers at operand 2 -- `fmla za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Error: operand mismatch -- `fmla za.b\[w8,20,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Info:    did you mean this\?
.*: Info:    	fmla za.h\[w8, 20, vgx4\], { ?z0.h ?}, { ?z30.h ?}
.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,15,vgx3\],{ ?z0.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.d\[w8,0,vgx3\],{ ?z30.h-z31.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z15.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h\[7\]'
.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},z0.h\[7\]'
.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},z0.h'
.*: Error: missing type suffix at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0-z1 ?},z0.h\[7\]'
.*: Error: missing type suffix at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0-z1 ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx1\],{ ?z10.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,15,vgx1\],{ ?z0.h-z1.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z30.h-z31.h ?},z0.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z15.h\[0\]'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h\[7\]'
.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},z0.h\[7\]'
.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},z0.h'
.*: Error: missing type suffix at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0-z1 ?},z0.h\[7\]'
.*: Error: missing type suffix at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0-z1 ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,15,vgx3\],{ ?z0.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmls za.d\[w8,0,vgx3\],{ ?z31.h-z0.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx3\],{ ?z0.h-z1.h ?},z15.h'
.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},z15.h'
.*: Error: operand mismatch -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},z15'
.*: Info:    did you mean this\?
.*: Info:    	fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z15.h
.*: Error: operand mismatch -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},z20'
.*: Info:    did you mean this\?
.*: Info:    	fmls za.h\[w8, 0, vgx2\], { ?z0.h-z1.h ?}, z20.h
.*: Error: comma expected between operands at operand 3 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w14,0,vgx1\],{ ?z10.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,15,vgx1\],{ ?z0.h-z1.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z31.h-z2.h ?},z0.h'
.*: Error: invalid vector group size at operand 1 -- `fmls za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},z15.h'
.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},z15.h'
.*: Error: operand mismatch -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},z15'
.*: Info:    did you mean this\?
.*: Info:    	fmls za.h\[w8, 0, vgx4\], { ?z0.h-z1.h ?}, z15.h
.*: Error: operand mismatch -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},z20'
.*: Info:    did you mean this\?
.*: Info:    	fmls za.h\[w8, 0, vgx4\], { ?z0.h-z1.h ?}, z20.h
.*: Error: comma expected between operands at operand 3 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx3\],{ ?z0.h-z1.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx3\],{ ?z10.h-z1.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.d\[w8,15,vgx3\],{ ?z0.h-z1.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx3\],{ ?z30.h-z31.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.b\[w8,0,vgx3\],{ ?z0.h-z1.h ?},{ ?z30.h-z31.h ?}'
.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h-z31.h ?}'
.*: Error: expected a list of 2 registers at operand 3 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h-z1.h ?},{ ?z30.h ?}'
.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Error: expected a list of 2 registers at operand 2 -- `fmls za.h\[w8,0,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Error: operand mismatch -- `fmls za.b\[w8,20,vgx2\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Info:    did you mean this\?
.*: Info:    	fmls za.h\[w8, 20, vgx2\], { ?z0.h ?}, { ?z30.h ?}
.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,0,vgx1\],{ ?z0.h-z1.h ?},{ ?z0.h-z3.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w14,0,vgx1\],{ ?z10.h-z1.h ?},{ ?z0.h-z3.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.s\[w8,15,vgx1\],{ ?z0.h-z1.h ?},{ ?z0.h-z3.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.h\[w8,0,vgx1\],{ ?z30.h-z31.h ?},{ ?z0.h-z1.h ?}'
.*: Error: invalid vector group size at operand 1 -- `fmls za.b\[w8,0,vgx1\],{ ?z0.h-z1.h ?},{ ?z30.h-z31.h ?}'
.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h-z31.h ?}'
.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h-z1.h ?},{ ?z30.h ?}'
.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Error: expected a list of 4 registers at operand 2 -- `fmls za.h\[w8,0,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Error: operand mismatch -- `fmls za.b\[w8,20,vgx4\],{ ?z0.h ?},{ ?z30.h ?}'
.*: Info:    did you mean this\?
.*: Info:    	fmls za.h\[w8, 20, vgx4\], { ?z0.h ?}, { ?z30.h ?}
